Muonpi board - Revision history

Simonglm: Fixed broken preamp link

2020-12-10T14:03:02Z

Fixed broken preamp link

Hgz: /* Power/Bias Supply */

2020-12-05T16:14:38Z

Power/Bias Supply

Hgz: /* Power/Bias Supply */

2020-12-05T16:13:11Z

Power/Bias Supply

Hgz: /* Power/Bias Supply */

2020-12-05T14:52:03Z

Power/Bias Supply

Hgz: /* Power/Bias Supply */

2020-12-05T14:46:06Z

Power/Bias Supply

Hgz: /* Power/Bias Supply */

2020-12-05T14:30:13Z

Power/Bias Supply

Hgz: /* Power/Bias Supply */

2020-12-05T13:30:34Z

Power/Bias Supply

Hgz: /* Detailed Description */

2020-12-05T13:29:55Z

Detailed Description

Hgz: /* RPi Interface */

2020-12-03T10:29:57Z

RPi Interface

Hgz: /* RPi Interface */

2020-12-03T10:09:54Z

RPi Interface

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 The MuonPi board implements following functionalities:
 * Two input channels
-* Supply voltage for remote powering the [[Preamp|preamplifier]] through the signal line: The voltage can be switched on/off through a GPIO signal (individually for the two channels). It includes overcurrent and overtemperature shutdown and a fault feedback signal.
+* Supply voltage for remote powering the [[preamplifier]] through the signal line: The voltage can be switched on/off through a GPIO signal (individually for the two channels). It includes overcurrent and overtemperature shutdown and a fault feedback signal.
 * Bias voltage supply for the SiPM sensor and bias voltage/current supervision. A DC/DC converter generates the required reverse biasing voltage from the RPi's 5V rail. The voltage can be switched on/off through a GPIO signal. Actual bias voltage and current are measured through the on-board ADC. The voltage can be controlled through the on-board DAC (not in HW version 2).

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 The bias voltage generation for the SiPM photo detector is foreseen in two ways, each one selected depending on the mounting. By default, the bias voltage of <33V is generated by the DC/DC converter around U502 (LM2733Y). It's output voltage is controlled by the voltage provided by channel 3 of the DAC (U402) with an intercept point set by the resistive divider network R500 to R502. The filtered output is shunted to ground by R503 to avoid a varying load of the converter circuit. After RF-filtering by L501, the voltage is passed through the current limiting series resistor R516 and shunted by n-mosfet Q501 which short-cuts the voltage to ground, when the BIAS_EN_N control signal is low. Otherwise, the non-zero output voltage is passed through the current measurement shunt R504. The symmetrical resistive dividers R505/R506 and R507/R508 tap the voltages at either side of R504 which are low-pass filtered through C503/C504 and buffered by U501 before routed to ADC channels 3 and 4. This circuit realizes both, measurement of the actual bias voltage present at the outputs X5,X6 as well as the measurement of the bias current.
-Alternativeley, the bias supply may be provided by an external, plug-on module U505. This could be useful when employing photodetectors with different bias voltage specification, e.g. Hamamatsu-type SiPMs with larger operating voltages of ~50..90V.
+Alternativeley, the bias supply may be provided by an external, plug-on module U505. This could be useful when employing photodetectors with different bias voltage specification, e.g. Hamamatsu-type SiPMs with larger operating voltages of ~50..90V. When suplying the bias voltage from such an external DC/DC converter, make sure to not mount the on-board converter U502 and associated components.
 The supply voltage of +5V for the preamplifiers is controlled by the current-limited load switches U503/U504 (TPS22944). The switches are enabled independently with a high level on PREAMP1/2_EN signals from the GPIO. The fault outputs from the switches are diode-OR-ed with D501/D502 and provide an error input to the MuonPi in any of these cases: overcurrent (>100mA) and over-temperature. In all cases, the switch disconnects the output until the fault condition is removed.
 [[File:Power section v3.1.png|thumb|640px|Power management and bias voltage generation (V3.1)]]

@@ Line 43: / Line 43: @@
 === Power/Bias Supply ===
 The bias voltage generation for the SiPM photo detector is foreseen in two ways, each one selected depending on the mounting. By default, the bias voltage of <33V is generated by the DC/DC converter around U502 (LM2733Y). It's output voltage is controlled by the voltage provided by channel 3 of the DAC (U402) with an intercept point set by the resistive divider network R500 to R502. The filtered output is shunted to ground by R503 to avoid a varying load of the converter circuit. After RF-filtering by L501, the voltage is passed through the current limiting series resistor R516 and shunted by n-mosfet Q501 which short-cuts the voltage to ground, when the BIAS_EN_N control signal is low. Otherwise, the non-zero output voltage is passed through the current measurement shunt R504. The symmetrical resistive dividers R505/R506 and R507/R508 tap the voltages at either side of R504 which are low-pass filtered through C503/C504 and buffered by U501 before routed to ADC channels 3 and 4. This circuit realizes both, measurement of the actual bias voltage present at the outputs X5,X6 as well as the measurement of the bias current.
 The supply voltage of +5V for the preamplifiers is controlled by the current-limited load switches U503/U504 (TPS22944). The switches are enabled independently with a high level on PREAMP1/2_EN signals from the GPIO. The fault outputs from the switches are diode-OR-ed with D501/D502 and provide an error input to the MuonPi in any of these cases: overcurrent (>100mA) and over-temperature. In all cases, the switch disconnects the output until the fault condition is removed.
 [[File:Power section v3.1.png|thumb|640px|Power management and bias voltage generation (V3.1)]]

@@ Line 43: / Line 43: @@
 === Power/Bias Supply ===
 The bias voltage generation for the SiPM photo detector is foreseen in two ways, each one selected depending on the mounting. By default, the bias voltage of <33V is generated by the DC/DC converter around U502 (LM2733Y). It's output voltage is controlled by the voltage provided by channel 3 of the DAC (U402) with an intercept point set by the resistive divider network R500 to R502. The filtered output is shunted to ground by R503 to avoid a varying load of the converter circuit. After RF-filtering by L501, the voltage is passed through the current limiting series resistor R516 and shunted by n-mosfet Q501 which short-cuts the voltage to ground, when the BIAS_EN_N control signal is low. Otherwise, the non-zero output voltage is passed through the current measurement shunt R504. The symmetrical resistive dividers R505/R506 and R507/R508 tap the voltages at either side of R504 which are low-pass filtered through C503/C504 and buffered by U501 before routed to ADC channels 3 and 4. This circuit realizes both, measurement of the actual bias voltage present at the outputs X5,X6 as well as the measurement of the bias current.
-The supply voltage of +5V for the preamplifiers is controlled by the current-limited load switches U503/U504 (TPS22944). The switches are enabled independently with a high level on PREAMP1/2_EN signals from the GPIO. The fault outputs from the switches are diode-OR-ed with D501/D502 and provide an error input to the MuonPi in any of the three cases: overcurrent (>100mA), over-temperature or short-circuit.
+The supply voltage of +5V for the preamplifiers is controlled by the current-limited load switches U503/U504 (TPS22944). The switches are enabled independently with a high level on PREAMP1/2_EN signals from the GPIO. The fault outputs from the switches are diode-OR-ed with D501/D502 and provide an error input to the MuonPi in any of these cases: overcurrent (>100mA) and over-temperature. In all cases, the switch disconnects the output until the fault condition is removed.
 [[File:Power section v3.1.png|thumb|640px|Power management and bias voltage generation (V3.1)]]

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 === Power/Bias Supply ===
-The bias voltage generation for the SiPM photo detector is foreseen in two ways, each one selected depending on the mounting. By default, the bias voltage of <33V is generated by the DC/DC converter around U502 (LM2733Y). It's output voltage is controlled by the voltage provided by channel 3 of the DAC (U402) with an intercept point set by the resistive divider network R500 to R502. The filtered output is shunted to ground by R503 to avoid a varying load of the converter circuit. After RF-filtering by L501, the voltage is passed through the current limiting series resistor R516 and shunted by n-mosfet Q501 which short-cuts the voltage to ground, when the BIAS_EN_N control signal is low. Otherwise, the non-zero output voltage is passed through the current measurement shunt R504. The symmetrical resistive dividers R505/R506 and R507/R508 tap the voltages at either side of R504 which are low-pass filtered through C503/C504 and buffered by U501 before routed to ADC channels 3 and 4. This circuit realizes both, measurement of the actual bias voltage as supplied to the SiPM as well as the measurement of the bias current.
+The bias voltage generation for the SiPM photo detector is foreseen in two ways, each one selected depending on the mounting. By default, the bias voltage of <33V is generated by the DC/DC converter around U502 (LM2733Y). It's output voltage is controlled by the voltage provided by channel 3 of the DAC (U402) with an intercept point set by the resistive divider network R500 to R502. The filtered output is shunted to ground by R503 to avoid a varying load of the converter circuit. After RF-filtering by L501, the voltage is passed through the current limiting series resistor R516 and shunted by n-mosfet Q501 which short-cuts the voltage to ground, when the BIAS_EN_N control signal is low. Otherwise, the non-zero output voltage is passed through the current measurement shunt R504. The symmetrical resistive dividers R505/R506 and R507/R508 tap the voltages at either side of R504 which are low-pass filtered through C503/C504 and buffered by U501 before routed to ADC channels 3 and 4. This circuit realizes both, measurement of the actual bias voltage present at the outputs X5,X6 as well as the measurement of the bias current.
 [[File:Power section v3.1.png|thumb|640px|Power management and bias voltage generation (V3.1)]]

← Older revision		Revision as of 13:29, 5 December 2020
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	=== Power/Bias Supply ===		=== Power/Bias Supply ===
		+	The bias voltage generation for the SiPM photo detector is foreseen in two ways, each one selected depending on the mounting. By default, the bias voltage of <33V is generated by the DC/DC converter around U502 (LM2733Y). It's output voltage is controlled by the voltage provided by channel 3 of the DAC (U402) with an intercept point set by the resistive divider network R500 to R502. The filtered output is shunted to ground by R503 to avoid a varying load of the converter circuit. After RF-filtering by L501, the voltage is passed through the current limiting series resistor R516 and shunted by n-mosfet Q501 which short-cuts the voltage to ground, when the BIAS_ENABLE control signal is high.
	[[File:Power section v3.1.png\|thumb\|640px\|Power management and bias voltage generation (V3.1)]]		[[File:Power section v3.1.png\|thumb\|640px\|Power management and bias voltage generation (V3.1)]]

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 === RPi Interface ===
-The interface of the MuonPi HAT connects to the 40-pin GPIO header of the Raspberry-Pi with several digital I/Os, the UART interface from the u-Blox chip and the interface to the on-board I2C bus. The four-channel ADC U401 (ADS1015/1115) acquires the voltages of the (optional) peak detector for the pulse amplitude measurement (ch1), the on-board supply voltage (nominal 3.3V, shifted into the ADC's input range by voltage divider R418/R419) on ch2 and the sense voltages (after the voltage dividers R505/506 and R507/508) at both ends of the sense resistor R504 (see "Power section") connected to channels 3 and 4, respectively. The 12-bit DAC U402 (MCP4728) provides a fine-grained adjustment of the two threshold voltages (THR1, THR2 on channels 1 and 2) and the control voltage on channel 3 for the DC/DC converter around U502. Channel 4 is not used, but routed to a through-hole pad "DAC4" where it may be used for any purpose.
+The interface of the MuonPi HAT connects to the 40-pin GPIO header of the Raspberry-Pi with several digital I/Os, the UART interface from the u-Blox chip and the interface to the on-board I2C bus. The four-channel ADC U401 (ADS1015/1115) acquires the voltages of the (optional) peak detector for the pulse amplitude measurement (ch1), the on-board supply voltage (nominal 3.3V, shifted into the ADC's input range by voltage divider R418/R419) on ch2 and the sense voltages (after the voltage dividers R505/506 and R507/508) at both ends of the sense resistor R504 (see "Power section") connected to channels 3 and 4, respectively. The 12-bit DAC U402 (MCP4728) provides a fine-grained adjustment of the two threshold voltages (THR1, THR2 on channels 1 and 2) and the control voltage on channel 3 for the DC/DC converter around U502. Channel 4 is not used, but routed to a through-hole pad "DAC4" where it may be used for any purpose. There are two I2C EEPROM chips on the board. U400 (24AA02UID) is for the MuonPi's specific storage of calibration parameters and the factory-programmed unique ID, while U405 (CAT24C32WI) which is actually connected to the RPi ID-I2C interface foreseen for exacly this purpose, provides the configuration parameters for HAT identification and automatic GPIO and boot overlay selection during the boot phase.
 [[File:Rpi interface v3.1.png|thumb|640px|RPi interface section with ADC, DAC, EEPROM, temp sensor, OLED interface and LEDs. (V3.1)]]
 === Power/Bias Supply ===
 [[File:Power section v3.1.png|thumb|640px|Power management and bias voltage generation (V3.1)]]